THỰC TẬP - VIỆC LÀM
[Microchip] Tuyển dụng kỹ sư
Microchip Viet nam Jobs (4 reqs)
Engineer – Design *1(I366-20)
Job Description
- Designer of analog blocks. Analog block design and simulations.
- Responsible for integrated circuit design of IP macros or a complete chip. Including circuit simulation and logic simulation
- Understanding the testing and silicon debug, system analysis are positive qualifications.
- Special skill in CAD system and IT is plus to support the design team while the team size is small
Job Requirements
- BS or MS in Electrical Engineering. Semiconductor courses preferred
- Analog circuitry knowledge. Analog simulation tools.
- Hands-on just graduate or 1 year plus in Semiconductor Integrated Circuit Development
- Strong background in Semiconductor Physics and Logical Analytics
- Familiar in using circuit and logic simulation tools.
- Mainstream CAD knowledge
- Fluency in Vietnamese, English, others are plus
- Professional ethic, team work
- No restriction to any country with Microchip’s presence
Sr. Engineer – Design*1 (I367-20)
Job Description
- Designer of analog blocks. Analog block design and simulations.
- Responsible for integrated circuit design of IP macros or a complete chip. Including circuit simulation and logic simulation
- Understanding the testing and silicon debug, system analysis are positive qualifications.
- Special skill in CAD system and IT is plus to support the design team while the team size is small
Job Requirements
- BS or MS in Electrical Engineering. Semiconductor courses preferred
- Hands-on 4+ years plus in Semiconductor Integrated Circuit Development
- Digital circuitry design. RTL code, Synthesis. Knowledge of Verilog. Wreal preferred
- Strong background in Semiconductor Physics and Logical Analytics
- Familiar in using circuit and logic simulation tools.
- Mainstream CAD knowledge
- Fluency in Vietnamese, English, others are plus
- Professional ethic, team work
- No restriction to any country with Microchip’s presence
Engineer - Design (SRAM)*1(I454-20)
Job Description
• Design and verify embedded CMOS memories
• Perform transistors level circuit optimization for performance, power and area
• Perform block level and full chip level simulations using mixed-signal simulators
• Monte-Carlo simulation of CMOS memory key building blocks
• EM/IR analysis for CMOS memory
• Support product and test engineers for yield improvement
Job Requirements
• Self-motivated and detail-oriented
• Knowledge of CMOS memory circuit design
• Programming languages: Perl, Shell script, Tcl, Makefile, SKILL
• Hands-on tools: Hspice, Finesim, Virtuoso
• Good understanding of NLDM and CCS/CCSN format
• BSEE with 4 years job related experience ; MSEE with 2 years job related experience
Sr. Engineer – Layout *2 (I515-20&I516-20)
Job Description
Managing and grow the layout design team.
Responsible for Analog cell layout, block level layout, macro planning and interconnect.
Compact layout is essential.
Working under designer’s supervision to keep schedule and quality intact.
Job Requirements
Hands-on 5 years plus in Semiconductor Integrated Circuit Layout Development
Familiar with using Cadence Design Environment.
Understanding of basic CMOS design and process is a must
Fluency in Unix, other programming language
Fluency in mainstream CAD layout tools, skill works a plus
Fluency in Vietnamese, English, others are plus
If you're interested, please email This email address is being protected from spambots. You need JavaScript enabled to view it.
