THỰC TẬP - VIỆC LÀM

[AmpereComputing] Intern Physical Design Engineer

Job Description:
We are looking for Intern Physical Design Engineer to help us grow our team. This is unique opportunity to become our regular engineer after your degree graduation at the University. You will be responsible for ASIC physical design and implementation on our cutting edge ARMv8 based server on chip solutions (X-Gene) that will be the backbone of future data centers. You will be interacting on a daily basis with our design team worldwide and will work on the latest technology nodes available in the industry. You will have an opportunity to work collaboratively with, and learn from industry veteran designers and architects to create a breakthrough design for cloud computing. Our engineers are excited about technology and innovation and channel that energy to deliver world-class products.

Responsibilities:
• Responsible for all aspects of physical design from netlist to GDS on sub-micron node, 16nm or lower
• Develop physical design methodologies, flow customization/automation/optimization, floor-planning, power/clock distribution, IP block assembly, place & route, and timing closure
• Own all the steps from (RTL/Netlist) to GDS for large functional blocks
• Perform power and noise analysis, RC extraction, LEC, physical verification, and other sign-off checks
• Implement design ECO to fix functional, timing, design constraints, crosstalk issues, etc. for pre- and post-layout


Qualifications:
• Final Student with GPA of 7.0 points on wards
• Have some basic working knowledge of Semiconductor devices, VLSI designs, ASIC design flow, etc.
• Familiar with UNIX, C, Verilog and Office applications
• Good understanding on microprocessor, CPU-based architecture
• Good debugging, problem solving and presentation skills
• Good communication skills in English and Vietnamese


Additional skills:
Any of the following is desirable but not required:
• Working experience on Perl, Tcl, Shell scripting and Makefile.
• Working experience on graphically Excel format, HTLM and web interface.
• Working experience on EDA tools (Mentor, Cadence and Synopsys).


Education:
• Student must be pursuing a Bachelor’s or Master’s Degree in Electronics/Physics/Computer Engineering/Computer Science or equivalent

Please send your CV to This email address is being protected from spambots. You need JavaScript enabled to view it. , MB: Ms Lien 0906673009

Location: Floor 2&3, Incubation Building A, Tan Thuan Road, Tan Thuan Export Processing Zone, Dist 7, HCM