[FingerVina] Tuyển thực tập và Kỹ sư Vi mạch

 Job Descriptions:
The SoC (System-on-Chip) Design Team is searching for a hands-on, team oriented, SoC design and verification engineers with strong digital design, synthesis, place and route and static timing expertise.

In this role you will be working as part of the team in all area of SoC design including RTL design, synthesis, physical design and timing closure of highly integrated, mixed-signal integrated circuits that implemented in latest technologies. You should have some knowledge of RTL coding using Verilog/VHDL, logic synthesis, timing analysis, DFT, Place & Route and physical design verification.

We offer professional training and support with competitive salary package and dynamic working environment.

Job Requirements:
The ideal candidates will meet some of the following requirements:
+ Familiar with Digital Logic Design and ASIC design flow
+ Knowledge of areas like Synthesis, DFT, Physical Design, Timing Analysis and Closure
+ Familiar with RTL languages such as Verilog/VHDL
+ Unix/Linux background desired
+ Can use English in communication and writing
+ Degree: bachelor of Science (BS) degree majoring in Electronic Engineering or equivalent
+ For Intern: Major in Computer Engineering, Electronic Engineering or equivalent

+ Training: technical and non-technical skills from 2 – 6 months
+ 13th month of salary committed, 15 annual leaves, Lunch, Medical Insurance program, Project bonus
+ Company activities: company trip, year – end party, sport clubs, employee of the year, long service award
+ For Intern: Gross Paid Internship is 2.500.000VNĐ/month + Lunch

Working place: SCS Building, Saigon High Tech Park, District 9, Ho Chi Minh City.
Contact: This email address is being protected from spambots. You need JavaScript enabled to view it.
Deadline: March 30, 2019